Timing-Architects Embedded System GmbH is part of Vector Informatik GmbH
Predictable by Design

TA Designer

TA Designer helps you manage extremely complex highly-integrated multifunctional systems by letting you switch between different system functionality abstraction levels and software architecture. Moreover, TA Designer assists with determining system timing requirements and design constraints and enables embedding of software development tools with respect to OEMs and Tier One suppliers.  

Using TA Designer

  • Architecture composition
  • Timing requirements specification
  • Assigning runnable entities to tasks
  • Software architecture verification

Key Features

  • Dataflow and software architecture visualization and analysis
  • Interactive execution sequence optimization
  • Requirement and architecture constraint specification
  • Visualisation of event chains, runnable entity sequences, data ages and data coherency needs
  • Interactive support for transitions from functional to dynamic architecture
  • Enhanced filter capability for timing-sensitive dataflow analysis
  • Performance metrics based on static model analysis, such as buffer size and multi-core communication speed
Requirement Specification
Allows defining entity metric requirements, such as task response time limits and maximum runnable net execution times.
Hierarchical Dataflow Analysis
Interactive hierarchical multi-layer dependency analysis of software architecture using advanced filtering and aggregation methods.
Constraints Visualization
Interactive display of requirements and constraints regarding event chains, runnable sequences etc. using overlays.
Software Architecture Visualization
Visual display of software structure including components, also enabling intercommunication analysis.
Time Pattern Based Execution
Visual display of the execution sequence of software components, with the option to specify and analyse communication requirements between runnable entitites.
About us

We develop comprehensive solutions for the design, architecture, simulation, automated optimization and target verification of embedded real-time multi-core and many-core systems. Read more »

Copyright 2018 © Timing-Architects Embedded Systems GmbH