Timing-Architects Embedded System GmbH is part of Vector Informatik GmbH
Fully integrated solution for designing, developing and verifying embedded multi- and many-core systems
Timing-Architects' highly innovative Tool Suite supports you throughout the entire project lifecycle,
including design, simulation, analysis, architecture optimization, and target verification.
Most software development projects (including multi-core ECUs) comprise three successive project phases,
namely a concept phase, a development phase, and a maintenance phase.
TA Tool Suite has been predominantly designed for use during the development phase.
These days, software development generally follows a V-Model approach that applies to the entire project lifecycle (i.e. from SOD to SOP),
and consists of multiple small v-cycles each of which determines a SW release.
| ||SOD Start of Development ||SW Release 1 ||SW Release 2 ||SW Release n-1 ||SW Release n-2 ||SOP Start of Production |
|Concept Phase ||Development & Verification Phase ||Maintenance Phase |
| ||Concept Phase ||Development Phase ||Verification Phase |
TA Tool Suite supports project managers, system architects, developers, integrators and engineers throughout the entire development of embedded real-time systems, helping you getting the most out of multi-core technology.
When it comes to software for embedded systems, it's the software architects who are in charge. TA Designer helps SW architects to break down top-level requirements into smaller tasks, creating software components and determining interdependencies. TA Simulator allows SW architects to evaluate suitability and performance of different software architecture, whilst our TA Opitmizer assists with making any alterations necessary to use the hardware at its full potental.
Software integrators harmonize internal and external software components by different suppliers. TA Designer enables linking software components to each other using their individual platforms. In this context, TA Inspector helps identifying all respective requirements caused by the new software environment. Our TA Integrator and TA Explorer tools assist SW integrators with determining the appropriate order of software execution in various OS configuration test scenarios.
System Engineering deals with all functional and non-functional aspects of the system currently under development. Means system engineers are also responsible for implementing all necessary modifications and alterations with regard to all non-functional requirements including safety, timing, reliability, documentation and many other tasks. This is where TA Simulator, TA Explorer, TA Inspector and TA Designer come into play, for both hardware and software architecture.
Tester responsibilites include checking whether the created code or physical hardware components are according to spec. Tester use TA Inspector to verify whether software controlling a particular piece of hardware is doing its job properly. In addition, testers use TA Inspector to compare the outcome of TA simulations with HIL and SIL test performances.
Function engineers design functions based on system requirements. In the process, they break down functions into less complex tasks. TA Designer and TA Simulator help function engineers determine whether their constructs are fit for purpose. In this context, function engineers also evaluate whether individual function snippets can be used across different product lines.
Electronic and Electric Architecture Designers aka E/E Architects develop the hardware architecture of the system including any specially designed computation and communication modules. Since hardware architecture heavily affects the overall system performance, E/E architects use TA Designer, TA Simulator, TA Explorer and TA Integrator to identify and investigate any performance bottlenecks caused by system topology.
TA Tool Suite supports the import of AUTOSAR® system description and/or ECU configuration data.
When using standardized development processes, this enables automation of modelling steps.
Moreover, importing other standard, new and customized data formats is available upon request.
- Optimize single-core software architecture for high-performance multi- or many-core processor platforms.
- Model embedded RT systems via an easy-to-use graphical editor, and import existing systems from both standard platforms (such as AUTOSAR and AMALTHEA) and hardware target traces.
- Simulate and optimize different system design alternatives at early development stages.
- Create plausible system utlilization and hardware dimensioning forecasts.
- Compare software implementation alternatives and optimize them with regard to real-time and performance properties.
- Import hardware target traces of your software, use them to auto-reconstruct a timing model, analyze the target trace with regard to real-time and performance properties, and compare it with simulation results.
- Import of software descriptions, requirements and other data from both standard and customized architecture description languages
- Integrate semiconductor and OS models for in-depth analysis
- Export of optimized architecture descriptions and extended configuration to third-party tools for further processing
- Import of target traces from debugger or instrumentation-based profiling
We develop comprehensive solutions for the design, architecture, simulation, automated optimization and target verification of embedded real-time multi-core and many-core systems. Read more »
Copyright 2018 © Timing-Architects Embedded Systems GmbH